1. Field of the Invention
This invention is related to a nonvolatile semiconductor memory device which comprises reprogrammable nonvolatile memory cells.
2. Description of the Related Art
A memory cell transistor including a floating gate or a charge storage layer is known as a nonvolatile memory cell (hereinafter referred to as a memory cell). In such a memory cell, data is stored by utilizing the phenomenon whereby the threshold of the memory cell changes according to the amount of charges stored in the floating gate or a charge storage layer. Therefore, the control of the threshold of a memory cell is important.
As a method for controlling the threshold of a memory cell, a method is known wherein the voltage applied to the memory cell is stepped up after each verification of the threshold of the memory cell while programming data (ref. Japan Patent Laid Open H7-169284, Hemink et al., Symposium on VLSI Technology, 1995, pp. 129-130). Concerning data erasure, memory cells are arranged in block units and erasure is performed in blocks. When the data which is stored in the memory cells belonging to a block is to be erased, the voltage applied to a well layer is stepped up after each verification of the threshold of all the memory cells belonging to the block until an erased state is reached.